The present invention relates to a signal analyzer that can analyze a signal in real time. More particularly, it relates to a real time signal analyzer that can produce time domain data and frequency domain data at substantially the same time and in real time, securing the coincidence between them, and can analyze them with resetting the center frequency and the signal analysis span arbitrarily in low cost configuration.
A real time FFT analyzer is a measurement apparatus that continuously transforms a signal under test by the process in real time without dead time in order to extract the frequency domain component from the signal to analyze it. FIG. 2 shows a schematic block diagram of a conventional FFT analyzer that provides such a real time process. An ADC (analog to digital converter) 10 converts a signal under test into a digital signal and then an IQ separator 12 separates it into the I (In-Phase) component and the Q (Quadrature-Phase) component. A digital mixer 14 provides a frequency shift process to the I component data and the Q component data according to a center frequency data and a decimation filter 16 provides a decimation process to these data according to a, selectable decimation coefficient. The decimation coefficient is defined as the ratio of the element number of the input data to that of the output data of the decimation filter 16. The value of the decimation coefficient data is decided depending on the setting of the data analysis span of the analyzer. An FFT processor 18, transforms the decimated time domain data, for example, 1024 points of the time domain data as one frame, into frequency domain data by the FFT. (Fast Fourier Transform) process. The decimation filter 16 has a data buffer (not shown) in the output portion, for sequential storage of one frame of data, and the data are written in this data buffer sequentially and continuously. The FFT processor 18 can complete the FFT process of the previous frame during the storage of the new data into the data buffer that allows the real time FFT analysis of the data. A memory 20 stores the output data of the FFT processor 18 sequentially. A trigger circuit 22 can set a trigger condition to the data in the memory 20. If the trigger condition is satisfied, the trigger circuit 22 outputs a trigger signal to read out the data that qualify the trigger condition from the memory 20. A CPU 24 controls the whole of the real time analyzer. The data read out from the memory 20 are sent to a display circuit (not shown) to display them on a display screen (not shown). This real time FFT analyzer can extract spectrum (or frequency component) data in real time without dead time and can capture an event occurrence that meets an arbitrary trigger condition for record and display.
It is necessary for the described real time FFT analyzer to set a center frequency and a signal analysis span, but it would be difficult to set these condition properly at the beginning if, especially, a signal under test has a transient variation or an incidental fluctuation. In such a case, it is desirable to set a wider analysis span at first and analyze and display the signal, and then to reset the center frequency and the analysis span any analyze the signal again to get a magnified display of a remarkable point of the signal component. Such a process, however, has been realized in a CPU by software before so that it requires plenty of time for the second data analysis and display process. Therefore there was such an attempt as further provides a zoom processor 26 (FIG. 3) specialized for zoom processing in order to make the signal process fast, but this leads the system to a complicate one and then cost up.
Besides, when it conducts the signal analysis and the signal display after changing the center frequency and the analysis span and if the signal is transient or incidental, it is impossible for the conventional signal analyzer as shown in FIGS. 2 and 3 to trace the original event accurately even if it acquires and analyzes the signal again.
Therefore what is desired is to provide a real time signal analyzer that can provide a low cost signal analysis with resetting the center frequency and the analysis span.
What is further desired is to provide a real time signal analyzer that allows any times of resetting of the center frequency and the analysis span even if the signal has a transient variation or an incidental fluctuation.
What is further desired is to provide a real time signal analyzer that produces time and frequency domain data at substantially the same time, having time correspondence and securing the coincidence between them, and can analyze them with resetting the center frequency and the analysis span.
A real time signal analyzer according to the present invention has a frequency conversion means for decimating input time domain data according to a selectable decimation coefficient, an FFT processor for transforming the output data of the frequency conversion means by the FFT process in real time, a delay means for delaying the output data of the frequency conversion means for a predetermined time, a frequency domain data memory means for storing the FFT processed frequency domain data from the FFT processor, a time domain data memory means for storing the delayed time domain data read out from the delay means, and a feedback means for feeding the data read out from the time domain data memory means back to the frequency conversion means instead of said input time domain data.
The delay means provides a predetermined delay time to the time domain data that makes the frequency domain data in the frequency domain data memory means and the time domain data in the time domain data memory means have time correspondence. It provides a repetitive FFT analysis according to the most suitable center frequency or decimation coefficient by means of feeding the time domain data from the time domain data memory means back to the frequency conversion means.